Efficient & Broadband Even-Order Harmonic Multiplication in Standard CMOS

Description:

    A novel technique to realize highly-efficient passive multipliers in a standard CMOS process is demonstrated to efficiently generate even-order harmonics while simultaneously suppressing odd-order harmonics over broad-bandwidths. This is achieved by improving the cutoff frequency (fT) well beyond a THz. The higher fT combined with proposed nonlinearity engineering allows efficient operation deep into sub-millimeter frequencies. Additionally, the inherent adaptive biasing features of structures result in stronger harmonic generation with process variation resilience and can also be utilized for frequency response shaping and optimize performance at various driving conditions.

 

Technical Summary:

    Efficient even-order frequency multiplication without degrading the dynamic cut-off frequency (fcd) allows for multiplication to reach above THz operating frequencies in standard silicon processes. The odd-harmonic cancellations and adaptive CV benefits of accumulation-mode anti-symmetric-CV varactors (ASVAR) are more pronounced in higher-order multiplications. Further improvements in performance and benefits such as post-fabrication frequency-response tweaking, process variations resilience, and optimum conversion loss (CL) at various power levels by adaptive voltage bias are also available in the newly proposed ASVAR.

 

Figure 1: Preliminary output spectrum from a Fourier transform spectrometer and comparison with prior state-of-the-art.

 

Value Proposition:

    The inherent features of ASVAR result in a compact and affordable solution for even-harmonic generation with process variation resilience and can also be used for frequency response shaping and optimizing performance at various driving conditions.

 

Applications:

  • Emerging THz Applications
  • Imaging & Communications Applications

 

Key Benefits:

  • High-Frequency Operation – Multiplication exceeds THz operating frequencies in standard silicon processes.
  • Efficient Even-Order Multiplication – Without limitations on bandwidth and efficiency imposed by baluns or symmetric combining structures.
  • Adaptive CV – Allows optimum harmonic performance with myriad of multiplication-orders and input power levels.

 

Inventors:

Kenneth O, Ph.D.

Zeshan Ahmad, Ph.D.

 

Publication: International Solid-State Circuits Conference (ISSCC) 2016; DOI: 10.1109/ISSCC.2016.7418051 - Link

IP Status: Patent pending.

Licensing Opportunity: This technology is available for exclusive or non-exclusive licensing.

ID Number: MP-15062

Contact: otc@utdallas.edu

Patent Information:
Category(s):
Communications
For Information, Contact:
OTC Licensing
The University of Texas at Dallas
otc@utdallas.edu
Inventors:
Kenneth O
Zeshan Ahmad
Keywords:
Devices
Electronics
Engineering & Physical Sciences
Imaging
Optics & Photonics
Semiconductor, MEMS & Nanotechnology
Signal Processing
Wireless